PUBLICATIONS

 

Journal Papers:

 

o    V. Khatri and G. Banerjee, “A 0.25-3.25 GHz Wideband CMOS-RF Spectrum Sensor for Narrowband Energy Detection,” IEEE Trans. VLSI Systems (Accepted, published online).

o    I. Raja, G. Banerjee, M. A. Zeidan and J. A. Abraham, “A 0.1-3.5 GHz Duty Cycle Measurement and Correction Technique in 130-nm CMOS,” IEEE Trans.

VLSI Systems, vol. 24, no. 5, pp. 1975-1983, May. 2016.

o    V. Khatri and G. Banerjee, “A Mitigation Technique for Harmonic Down-conversion in Wideband Spectrum Sensors.” IEEE Trans. Instrumentation  and Measurement,

vol. 64, no. 12, pp. 3226-3238,  Dec. 2015.

o    V. Khatri and G. Banerjee, “A 0.5-2.0 GHz Injection Locked Oscillator Cascade for Parallel Wideband RF Spectrum Sensing”, Analog Int. Circ. And Sig. Proc.,

Springer, Volume 84, Issue 1, pp. 29-42, July 2015.

o    M. A. Zeidan, G. Banerjee, J. A. Abraham, “Asynchronous Measurement of Transient Phase Shift Resulting from RF Receiver State Change”, IEEE Trans. 

Circuits and Systems I, vol. 60, no. 10, pp. 2740-2751, Oct. 2013.

o    Pramod M., Ranjith K., N. Bhat, G. Banerjee, B. Amrutur,  K. N. Bhat and P. C. Ramamurthy, "CMOS Gas Sensor Array Platform with Fourier Transform 

based Impedance Spectroscopy",  IEEE Trans. Circuits and Systems I, vol.59, no. 11, pp. 2507-2517, Nov. 2012 .

o    M. A. Zeidan, G. Banerjee, R. Gharpurey, J. A. Abraham, “Phase-Aware Multitone Digital Signal Based Test for RF Receivers”, IEEE Trans.  Circuits and

Systems I, vol. 59, no. 9, pp. 2097-2110, Sep. 2012.

o    G. Banerjee, M. Behera, M.A. Zeidan, R. Chen and K. Barnett,  “Analog/RF Built-in-Self-Test Subsystem for a Mobile Broadcast Video Receiver in 65-nm CMOS”,

IEEE J. Solid State Circuits, vol. 46, no. 9, pp. 1998-2008, Sep. 2011.

 

Pre-IISc

o    G. Banerjee, K. Soumyanath and D. J. Allstot, "Desensitized CMOS Low Noise Amplifiers", IEEE Trans. Circuits and Systems I, vol. 55, no. 3, pp. 752-765, Apr. 2008.

o    G. Balamurugan, J. Kennedy, G. Banerjee, J. Jaussi, M. Mansuri, F. O’Mahony, B. Casper and R. Mooney, “A Scalable 5–15 Gbps, 14–75 mW Low-Power I/O Transceiver in 65 nm

CMOS”, IEEE J. Solid State Circuits, vol. 43, no. 4, pp. 1010-1019, Apr. 2008.

o    G. Banerjee, K. Soumyanath and D. J. Allstot, "Measurement and Modeling Errors in Noise Parameters of Scaled-CMOS Devices", IEEE Trans. Microwave Theory and

Techniques, vol. 54, no. 6, pp. 2336-2345, Jun. 2006.

o    Y. Palaskas, A. Ravi, S. Pellerano, B. R. Carlton, M. A. Elmala, R. Bishop, G. Banerjee, R. B. Nicholls, S. Ling, N. Dinur, S. S. Taylor, K. Soumyanath, "A 5GHz 108Mb/s 2x2

MIMO Transceiver with Fully Integrated 20.5dBm P1dB Power Amplifiers in 90nm CMOS", IEEE J. Solid State Circuits, vol. 41, no. 12, pp. 2746-2756, Dec. 2006.

o    G. Banerjee, G. Niu, J. D. Cressler, S.D. Clark, M. J. Palmer and D. C. Ahlgren, "Anomalous Dose Rate Effects in Gamma Irradiated SiGe Heterojunction Bipolar Transistors",

IEEE Trans. Nuclear Science, vol. 46, no. 6, pp. 1620-1626, Dec. 1999.

o    G. F. Niu, S. J. Mathew, G. Banerjee, J. D. Cressler, and S. D. Clark, "Total Dose Effects on the Shallow-Trench Isolation Leakage Current Characteristics in a 0.35mm

SiGe BiCMOS Technology", IEEE Trans. Nuclear Science, vol. 46, no. 6, pp. 1841-1847, Dec. 1999.

o    G.F. Niu, G. Banerjee, J.D. Cressler, J.M. Roldan, and S.D. Clark, "Electrical probing of Anomalous surface and bulk traps in proton-irradiated gate-assisted Lateral PNP

transistors", IEEE Trans. on Nuclear Science, vol. 45, no. 6, pp. 2361-2365, Dec. 1998.

o    G. Banerjee and A. K. Mallick, "A Semi-Empirical Model for Low Latitude HF Ionospheric Propagation Prediction", IEEE Trans. on Broadcasting, vol. 43, no. 1, pp. 89-95,

March 1997.

 

Conference Papers:

 

o    Z. Zahir and G. Banerjee, “A 1-2 GHz low phase-noise wide-band LC-VCO with active inductor based noise filter,” 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Lisbon, Portugal, June 2016.  

o    J.S. Gaggatur, P. K. Dixena and G. Banerjee, "A 3.2mW 0.13um High Sensitivity Frequency-Domain CMOS Capacitance Interface", IEEE International Symposium

on Circuits and Systems (ISCAS), Montreal, Canada, May 2016.

o    Z. Zahir and G. Banerjee, “A Fast Acquisition Phase Frequency Detector for High Frequency PLLs,” IEEE WIECON-ECE 2015, Dhaka, Bangladesh,

Dec. 2015. (Best Paper Award).

o    M. Lenka, A. Agrawal, V. Khatri and G. Banerjee, “A Wide-band Receiver Front-end With Programmable Frequency Selective Input Matching,” in Proc.

29th Int. Conf. on VLSI Design, Kolkata, India, Jan. 2016.

o    T. Aditya Chowdary and G. Banerjee, “An Integrated X-band FMCW Radar Transceiver in 130-nm CMOS Technology,” IEEE International Microwave and

Radio Conference (IMaRC), Hyderabad, India, Dec. 2015.

o    G. S. Javed and G. Banerjee, “Integrated Temperature Sensor for Reconfigurable Radio Frequency Synthesizer”, IEEE CONECCT, 2015, Bangalore, India.

o    V. Khatri and G. Banerjee, “Complex filter based spectrum sensor for narrowband detection over a wide sensing bandwidth”, IEEE CONECCT, 2015,

Bangalore, India.

o    G.S. Javed, V. Khatri, I. Raja, M. Lenka and G. Banerjee, "Differential Multi-phase DLL for Reconfigurable Radio Frequency Synthesizer", IEEE CONECCT,

2014, Bangalore, India.

o    Pramod M., N. Bhat, G. Banerjee, B. Amrutur, K. N. Bhat and P. C. Ramamurthy, "CMOS Gas Sensor Array Platform with Fourier Transform based

Impedance Spectroscopy", in Proc. 25th Int. Conf. on VLSI Design, Hyderabad, India, Jan-2012.

 

Pre-IISc

o   M. Zeidan, G. Banerjee, R. Gharpurey, J. Abraham, "Multitone Digital Signal Based Test for Broadband RF Receivers",  in 28th IEEE VLSI Test Symp., Santa Cruz, CA, April 2010.         

o   G. Balamurugan, J. Kennedy, G. Banerjee, J. E. Jaussi, M. Mansuri, F. O'Mahony, B. Casper, R. Mooney, "A Scalable 5-15Gbps, 14-75mW Low Power I/O Transceiver in 65nm CMOS",

in 2007 IEEE Symp. on VLSI Circuits, Kyoto, Japan, June 2007, pp. 270-271.

o    G. Banerjee, R. E. Bishop, K. Soumyanath and D. J. Allstot, "A 1.4V/5 GHz, 90-nm System-in-a-Package LNA", in 2006 IEEE Radio and Wireless Symposium, San Diego, CA,  Jan. 2006, pp. 35-38.

o    Y. Palaskas, A. Ravi, S. Pellerano, B. R. Carlton, M. A. Elmala, R. Bishop, G. Banerjee, R. B. Nicholls, S. Ling, P. Seddighrad, S.-Y. Suh, S. S. Taylor, K. Soumyanath, "A 5GHz,  108Mb/s 2x2 MIMO

CMOS Transceiver", IEEE Radio and Wireless Symposium, 2007.

o    Y. Palaskas, A. Ravi, S. Pellerano, B. Carlton, M. Elmala, R. Bishop, G. Banerjee, R. Nicholls, S. Ling, S. Taylor and K. Soumyanath, "A 5GHz 108Mb/s 2×2 MIMO Transceiver  with Fully

Integrated 16dBm PAs in 90nm CMOS", in IEEE ISSCC Dig. Tech. papers, 2006, pp. 1420-1429.

o    A.Ravi, B. R. Carlton, Y. Palaskas, G. Banerjee, R. E. Bishop, M. A. Elmala, R. B. Nicholls, I.A. Rippke, H. Lakdawala, L.M. Franca-Neto, S. S. Taylor and K. Soumyanath,  A 1.4V 2.4/5 GHz,

90-nm CMOS System in a package Transceiver for Next Generation WLAN,” IEEE VLSI Circuits Symp. Dig. Tech. Papers, Jun. 2005, pp. 294-297.

o    D. J. Allstot, S. Aniruddhan, G. Banerjee, M. Chu, X. Li, J. Paramesh, S. Shekhar and K. Soumyanath., "Circuit Techniques for CMOS Multiple Antenna Transceivers",  in

2005 IEEE-RFIC symposium, Long Beach, CA, pp. 225-228.

o    G. Banerjee, D. T. Becher, C. Hung, K. Soumyanath and D. J. Allstot, "Desensitized Design of MOS Low Noise Amplifiers by Rn Minimization", in 11th IEEE Int. Conf. Electron., Circuits and Syst.,

Tel Aviv, Israel, Dec. 2004, pp. 619-622.

o    G. Banerjee, D. T. Becher, C. Hung, D. J. Allstot and K. Soumyanath, "Measurement and Modeling of Noise parameters for desensitized Low Noise Amplifiers", in IEEE Custom Integrated Circuits

Conference, Orlando, FL, Oct. 2004, pp. 387-390.

o   D. Becher, G. Banerjee, R. Basco, C. Hung, K. Kuhn, W. Shih, "Noise performance of 90-nm CMOS technology", in 2004 IEEE MTT-S Int. Microw. Symp. Dig., Fort Worth, TX, Jun. 2004, pp. 17-20.

o    Ravi, G. Banerjee, R. E. Bishop, B. A. Bloechel, L. R. Carley and K. Soumyanath, "10 GHz, 20 mW, fast locking, adaptive gain PLLs with on-chip frequency calibration for agile frequency

synthesis in a 0.18-mm digital CMOS process", in IEEE VLSI Circuits Symp. Dig. Tech. Papers., Jun. 2003, pp. 294-297.

 

Reports:

o    G. Banerjee, "Desensitized CMOS Low Noise Amplifiers", Doctoral Dissertation, Univ. of Washington, 2006.

o    G. Banerjee, "Ionizing Radiation Effects in Silicon-Germanium BiCMOS Technology", Masters Thesis, Auburn University, 1999.

o    G. Banerjee, "Design and Simulation of SiGe Channel pMOSFETs", Undergraduate Thesis, Indian Institute of Technology, Kharagpur, India, 1997.