Current Members
Principal Investigator
| LinkedIn Profile | Name | Position | Room No. | Email Id |
|---|---|---|---|---|
|
Professor Indian Institute of Science |
SP 2.16 Signal Processing Building Dept. of ECE |
Admins
| # | Profile | Name | Role | Room No. | Email Id |
|---|---|---|---|---|---|
| 1. |
|
Administrative Assistant | SP 2.24 |
Ph D Students
| # | LinkedIn Profile | Name | Year of Enrollment | Research Topic | Room No. | Email Id |
|---|---|---|---|---|---|---|
| 3. |
|
2018 | Analog/RF IC Design & Testing | SP 2.24 | ||
| 4. |
|
2019 | SP 2.27
|
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| 5. |
|
2019 | SP 2.27 | |||
| 6. |
|
2019 | SP 2.27
|
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| 7. |
|
2020 | SP 2.27 |
M Tech Students
| # | LinkedIn Profile | Name | Year of Enrollment | Research Topic | Room No. | Email Id |
|---|---|---|---|---|---|---|
| 1. |
|
2021 | SP 2.27 | |||
| 2. |
|
2021 | SP 2.27 |
Alumni
Ph D Students
| Sl. No. | Name | Year of Graduation | Research Topic | Currently working | LinkedIn Profile |
|---|---|---|---|---|---|
| 1. | Javed.G.S | 2016 | Sensor Interface Circuits | Intel (IPG), Bangalore | |
| 2. | Vishal Khatri | 2016 | CMOS realization of spectrum sensor IC's for Cognitive radio application | IBM, Bangalore | |
| 3. | Immanuel Raja | 2016 | Integrated Power Amplifiers in CMOS for reconfigurable, multiband RF systems | Qualcomm, Bangalore | |
| 4. | Zaira Zahir | 2017 | Frequency Synthesizers for Cognitive radios | Samsung, Bangalore | |
| 5. | Manas Kumar Lenka | 2018 | Blocker Tolerant Receiver Design Suitable for Software-defined and Cognitive Radio Applications | Rambus, Bangalore | |
| 6. | Pushtivardhan Soni | 2023 | Broadband Millimeter-Wave CMOS Transceiver for 5G Mobile Communication and Radar-Based Sensing | Texas Instruments, Bangalore |
M Tech Students
| Sl. No. | Name | Year of Graduation | Research Topic | Currently working | LinkedIn Profile | |
|---|---|---|---|---|---|---|
| 1. | Pradeep Kumar Dixena | 2011 | Frequency Domain Capacitance to Digital Conversion | DRDO, Hyderabad | ||
| 2. | R. Ramachandran | 2011 | Analog Techniques for Frequency Domain Capacitance to Digital Conversion | ISRO, Bangalore | ||
| 3. | Shaik Azeemuddin | 2012 | CMOS RF receiver front-end design for 60 GHz radio | ISRO Satellite Centre Bangalore | ||
| 4. | Deepesh Jain | 2012 | mm-wave CMOS Power Amplifier Design and Power Combining Techniques | ISRO, Bangalore | ||
| 5. | Arnab Chakraborty | 2014 | 0.1GHz - 20GHz CMOS LNA Design | Qualcomm, Bangalore | ||
| 6. | Aditya Chowdary | 2015 | Design Of X-band FMCW Radar Transceiver in 130-nm CMOS technology | Qualcomm, Bangalore | ||
| 7. | Akash Agrawal | 2016 | Design of Fractional-N Synthesizer for Generation of FMCW Signal | Qualcomm, Bangalore | ||
| 8. | Vysakh K | 2017 | FMCW Radar Transceiver | Texas Instruments, Bangalore | ||
| 9. | Sachin G Anvekar | 2017 | FMCW Radar Transceiver | MaxLinear, Bangalore | ||
| 10. | Suraj Nigave | 2018 | S-Band Radar Transceiver System Design | Qualcomm, Bangalore | ||
| 11. | Siddharth Goyal | 2018 | S-Band Radar Transceiver System Design | Nvidia, Bangalore | ||
| 12. | Avinash Shah | 2019 | High-Harmonic Rejection Mixer for FMCW Radar-on-Chip | MaxLinear, Bangalore | ||
| 13. | Uma Suri | 2019 | K-Band Radar Transceiver System Design | Rambus, Bangalore | ||
| 14. | Sathish D | 2019 | K-Band Radar Transceiver System Design | Rambus, Bangalore | ||
| 15. | Abhishek Birla | 2020 | PMCW Radars on Chip | Texas Instruments, Bangalore | ||
| 16. | Aswin R | 2021 | Built-in Self-Test Schemes for ADC Linearity Test | Texas Instruments, Bangalore | ||
| 17. | Harshal Pidiyar | 2021 | Frequency Synthesis For Wideband Radar Applications | Synopsys Inc, Bangalore | ||
| 18. | Shayak Bhattacharyya | 2021 | Design of Key Building blocks for UWB/OFDM Radar-on-chip | MaxLinear, Bangalore | ||
| 19. | Sadasiva Naddi | 2022 | Digitally Calibrated DAC Design | Texas Instruments, Bangalore | ||
| 20. | Arshad Qureshi | 2022 | Methods for I/O Buffer Testing and Switching Noise Mitigation | Texas Instruments, Bangalore |
Project Associates
| Sl. No. | Name | Role | Currently working | LinkedIn Profile |
|---|---|---|---|---|
| 1. | Jaideep Chauhan | Design Engineer | Global Foundries, Bangalore | |
| 2. | Bhavani Shankar Appalla | Test Engineer | Tessolve Semiconductors, Bangalore | |
| 3. | Saijagan | Design Engineer | Untether AI Toronto, Canada | |
| 4. | Sumit Kumar | Design & Test Engineer | Ph D, IISc Bangalore | |
| 5. | Rituraj Kar | Design & Test Engineer | Qualcomm, Bangalore |